As the circuit densities of integrated circuit semiconductor devices has increased, the structure of semiconductor packages supporting the device has also become more dense and complex. Packaging substrates that support and interconnect a plurality of semiconductor devices are common. The substrate structure capable of interconnecting several integrated circuit devices where each device may have over 100 terminals, must be provided with a relatively dense and complex metallurgy system of very fine lines. The metallurgy system can be embodied within the substrate, as in the multi-layer ceramic substrate of the type described in U.S. Pat. No. 3,838,204, or IBM TDB Vol. 13 No. 4 September 1970 P. 926. Alternately, the metallurgy system can be embodied in one or more layers of conductive lines on the surface of the substrate as described in U.S. Pat. No. 3,388,301, or a combination of internal lines and surface layers as described in U.S. Pat. No. 3,726,002.
When the conductive metallurgy lines are on the top surface of a ceramic substrate, a conventional technique for forming fine lines is to evaporate a blanket layer of metal, as for example, aluminum, and subsequently remove the undesired portions of the layer by photolithographic masking and subtractive etching techniques. When more than a single metallurgy layer is desired, a blanket layer of dielectric material, such as polyimide resin, is applied over the metallurgy layer, via holes etched through the dielectric layer, and a subsequent metal layer deposited and subtractively etched.
As the lines become smaller, the nature of the surface of the ceramic substrate on which the lines are formed becomes more critical. When the surface is too rough, the etchant may get under the metal layer under a masked area and remove portions or even all of the metallurgy stripe. The masking layer on the top surface of the blanket layer of metal will not prevent this etching action. Thus the metallurgy stripes may be narrowed down to such an extent that they will fail at some later date, or in the extreme case, may be severed before the package has been completed.
A technique for producing a smooth surface on a ceramic substrate is to polish the surface. However, polishing a sintered ceramic substrate is time-consuming and expensive because the material is very hard. Another technique is to deposit a thin layer of glass on the surface of the ceramic substrate, as described in U.S. Pat. No. 3,437,505. However, in packaging technology, this technique has its limitations. If the substrate has holes for receiving pins, the surface tension of the glass produces a rounded and thinned glass layer around the holes. This is quite objectionable.